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                        SPLDs/CPLDs

                        Our portfolio of Electronic Programmable Logic Devices (EPLDs) includes two major product categories: Simple Programmable Logic Devices (SPLDs) and higher-density Complex Programmable Logic Devices (CPLDs).

                        Industry-Standard SPLDs

                        Microchip is the sole manufacturer of SPLD products that replaced PLA- and PAL-type devices in the mid-1990s. These products consist of industry-standard 16V8 and 22V10 families of devices that are available in a variety of voltage and power-saving options. We offer low-voltage, zero-power and quarter-power versions, as well as our proprietary "L" devices that automatically power down to low-power mode,  including the battery-friendly ATF22LV10CQZ. These devices are available in all popular package types, including the Microchip-only TSSOP package, which is the smallest package offered for any SPLD device. All versions are EE-based for high reliability and easy reprogramming and are supported by our free WinCUPL design software. These SPLDs can also be programmed using popular third-party programmers. Click on the PLD Design Resources link above for more information about software and hardware tools.

                        Industry-Standard-Compatible CPLDs

                        Our CPLDs can be used for I/O expansion as well as for memory, control and interfacing with different types of memories such as compact Flash or mobile SDRAM.

                        The ATF15xxAS/ASL/ASV/ASVL family offers pin-compatible supersets of the popular Altera 7000 and 3000 series devices. They range from 32 to 128 macrocells with propagation delays from 7.5 to 15 ns for standard-power 5V versions and 15 ns for 3.3V versions. Our proprietary low-power ("L") versions use Input Transition Detection (ITD) to power down the device automatically when the device is idle. All devices also support JTAG In-System Programming (ISP).

                        The ATF15xx family of CPLDs delivers enhanced functionality and flexibility without requiring any additional design effort. The Logic Doubling architecture allows you to implement double the latch functions per microcell, enabling you to use a smaller device or providing spare room for revisions. This family of devices also offers the most powerful switch matrix and routing resources of any CPLD while also supporting multiple independent feedbacks, individual output enable, global clear, D/T/latch-configurable flip-flops, more global clock pins and a programmable pin keeper circuit for bus interfacing.

                        Converting an Altera EPM7000 series design is easy with our free, push-button POF2JED software utility that generates an industry-standard JEDEC programming file from an Altera POF file. Click on the PLD Design Resources link above for more information about software and hardware tools.

                        Proprietary CPLDs

                        Our ATF750C/CL and ATF2500C CPLDs have a unique architecture that enables you to pack in more logic in a fully interconnected manner. The ATF750C has twice the logic of a standard 22V10 in a pinout-compatible 24- or 28-pin package. The ATF750C is ideal for 22V10 designs that need a bit more logic than is offered in a 22V10 device but need to maintain the 22V10 pinout. The ATF2500C is a very-high-density (2500 usable gates) 44-pin CPLD that is suitable for the most difficult 44-pin designs. The ATF2500C (electrically erasable) is a replacement for the ATV2500B/BQ/BQL/BL in commercial, industrial and military temperature grade offerings.

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